Revert "intrng: change multi-interrupt root support type to enum"

This reverts commit 536c8d948e.  The
change seemed fine on the surface, but converting to an enum has raised
some concerns due to the asm <-> C interface.  Back it out and let
someone else deal with it later if they'd like to.

Further context about the concerns can be found in D47279.
This commit is contained in:
Kyle Evans 2024-10-25 16:18:32 -05:00
parent d8cd2d0833
commit 4b01a7fa76
13 changed files with 46 additions and 51 deletions

View file

@ -28,14 +28,15 @@
*/
#include <sys/param.h>
#include <sys/bus.h>
#include <sys/cpuset.h>
#include <sys/systm.h>
#include <sys/assym.h>
#include <sys/intr.h>
#include <sys/pcpu.h>
#include <sys/proc.h>
#include <sys/mbuf.h>
#include <sys/vmmeter.h>
#include <sys/bus.h>
#include <vm/vm.h>
#include <vm/vm_param.h>
#include <vm/pmap.h>
@ -48,7 +49,6 @@
#include <machine/proc.h>
#include <machine/cpufunc.h>
#include <machine/cpuinfo.h>
#include <machine/intr.h>
#include <machine/sysarch.h>
#include <machine/vmparam.h> /* For KERNVIRTADDR */

View file

@ -200,7 +200,7 @@ gic_cpu_mask(struct arm_gic_softc *sc)
#ifdef SMP
static void
arm_gic_init_secondary(device_t dev, enum root_type root_type)
arm_gic_init_secondary(device_t dev, uint32_t rootnum)
{
struct arm_gic_softc *sc = device_get_softc(dev);
u_int irq, cpu;

View file

@ -538,7 +538,7 @@ bcm_lintc_init_pmu_on_ap(struct bcm_lintc_softc *sc, u_int cpu)
}
static void
bcm_lintc_init_secondary(device_t dev, enum root_type root_type)
bcm_lintc_init_secondary(device_t dev, uint32_t rootnum)
{
u_int cpu;
struct bcm_lintc_softc *sc;

View file

@ -43,12 +43,6 @@
#include <dev/ofw/openfirm.h>
#endif
enum root_type {
INTR_ROOT_IRQ = 0,
INTR_ROOT_COUNT /* MUST BE LAST */
};
#ifndef NIRQ
#define NIRQ 1024 /* XXX - It should be an option. */
#endif

View file

@ -29,12 +29,12 @@
#include <sys/param.h>
#include <sys/assym.h>
#include <sys/bus.h>
#include <sys/intr.h>
#include <sys/pcpu.h>
#include <sys/proc.h>
#include <machine/efi.h>
#include <machine/frame.h>
#include <machine/intr.h>
#include <machine/machdep.h>
#include <machine/pcb.h>

View file

@ -1093,7 +1093,7 @@ gic_v3_bind_intr(device_t dev, struct intr_irqsrc *isrc)
#ifdef SMP
static void
gic_v3_init_secondary(device_t dev, enum root_type root_type)
gic_v3_init_secondary(device_t dev, uint32_t rootnum)
{
struct gic_v3_setup_periph_args pargs;
device_t child;
@ -1140,7 +1140,7 @@ gic_v3_init_secondary(device_t dev, enum root_type root_type)
for (i = 0; i < sc->gic_nchildren; i++) {
child = sc->gic_children[i];
PIC_INIT_SECONDARY(child, root_type);
PIC_INIT_SECONDARY(child, rootnum);
}
}

View file

@ -1293,7 +1293,7 @@ gicv3_its_setup_intr(device_t dev, struct intr_irqsrc *isrc,
#ifdef SMP
static void
gicv3_its_init_secondary(device_t dev, enum root_type root_type)
gicv3_its_init_secondary(device_t dev, uint32_t rootnum)
{
struct gicv3_its_softc *sc;

View file

@ -31,13 +31,6 @@
#include <dev/ofw/openfirm.h>
#endif
enum root_type {
INTR_ROOT_IRQ = 0,
INTR_ROOT_FIQ = 1,
INTR_ROOT_COUNT /* MUST BE LAST */
};
#ifndef NIRQ
#define NIRQ 16384 /* XXX - It should be an option. */
#endif
@ -53,4 +46,7 @@ arm_irq_memory_barrier(uintptr_t irq)
#define ACPI_GPIO_XREF 3
#endif
#define INTR_ROOT_FIQ 1
#define INTR_ROOT_NUM 2
#endif /* _MACHINE_INTR_H */

View file

@ -74,7 +74,7 @@ CODE {
}
static void
null_pic_init_secondary(device_t dev, enum root_type root_type)
null_pic_init_secondary(device_t dev, uint32_t rootnum)
{
}
@ -157,7 +157,7 @@ METHOD void pre_ithread {
METHOD void init_secondary {
device_t dev;
enum root_type root_type;
uint32_t rootnum;
} DEFAULT null_pic_init_secondary;
METHOD void ipi_send {

View file

@ -89,6 +89,15 @@
#define INTRNAME_LEN (2*MAXCOMLEN + 1)
/*
* Archs may define multiple roots with INTR_ROOT_NUM to support different kinds
* of interrupts (e.g. arm64 FIQs which use a different exception vector than
* IRQs).
*/
#if !defined(INTR_ROOT_NUM)
#define INTR_ROOT_NUM 1
#endif
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); \
printf(fmt,##args); } while (0)
@ -106,7 +115,7 @@ struct intr_irq_root {
void *arg;
};
static struct intr_irq_root intr_irq_roots[INTR_ROOT_COUNT];
static struct intr_irq_root intr_irq_roots[INTR_ROOT_NUM];
struct intr_pic_child {
SLIST_ENTRY(intr_pic_child) pc_next;
@ -328,16 +337,16 @@ isrc_release_counters(struct intr_irqsrc *isrc)
* from the assembler, where CPU interrupt is served.
*/
void
intr_irq_handler(struct trapframe *tf, u_register_t root_type)
intr_irq_handler(struct trapframe *tf, uint32_t rootnum)
{
struct trapframe * oldframe;
struct thread * td;
struct intr_irq_root *root;
KASSERT((uintmax_t)root_type < INTR_ROOT_COUNT,
("%s: invalid interrupt root %ju", __func__, (uintmax_t)root_type));
KASSERT(rootnum < INTR_ROOT_NUM,
("%s: invalid interrupt root %d", __func__, rootnum));
root = &intr_irq_roots[root_type];
root = &intr_irq_roots[rootnum];
KASSERT(root->filter != NULL, ("%s: no filter", __func__));
kasan_mark(tf, sizeof(*tf), sizeof(*tf), 0);
@ -486,11 +495,11 @@ isrc_free_irq(struct intr_irqsrc *isrc)
}
device_t
intr_irq_root_device(enum root_type root_type)
intr_irq_root_device(uint32_t rootnum)
{
KASSERT((uintmax_t)root_type < INTR_ROOT_COUNT,
("%s: invalid interrupt root %ju", __func__, (uintmax_t)root_type));
return (intr_irq_roots[root_type].dev);
KASSERT(rootnum < INTR_ROOT_NUM,
("%s: invalid interrupt root %d", __func__, rootnum));
return (intr_irq_roots[rootnum].dev);
}
/*
@ -891,7 +900,7 @@ intr_pic_deregister(device_t dev, intptr_t xref)
*/
int
intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
void *arg, enum root_type root_type)
void *arg, uint32_t rootnum)
{
struct intr_pic *pic;
struct intr_irq_root *root;
@ -916,9 +925,9 @@ intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
* Note that we further suppose that there is not threaded interrupt
* routine (handler) on the root. See intr_irq_handler().
*/
KASSERT((uintmax_t)root_type < INTR_ROOT_COUNT,
("%s: invalid interrupt root %ju", __func__, (uintmax_t)root_type));
root = &intr_irq_roots[root_type];
KASSERT(rootnum < INTR_ROOT_NUM,
("%s: invalid interrupt root %d", __func__, rootnum));
root = &intr_irq_roots[rootnum];
if (root->dev != NULL) {
device_printf(dev, "another root already set\n");
return (EBUSY);
@ -1571,16 +1580,16 @@ void
intr_pic_init_secondary(void)
{
device_t dev;
enum root_type root_type;
uint32_t rootnum;
/*
* QQQ: Only root PICs are aware of other CPUs ???
*/
//mtx_lock(&isrc_table_lock);
for (root_type = 0; root_type < INTR_ROOT_COUNT; root_type++) {
dev = intr_irq_roots[root_type].dev;
for (rootnum = 0; rootnum < INTR_ROOT_NUM; rootnum++) {
dev = intr_irq_roots[rootnum].dev;
if (dev != NULL) {
PIC_INIT_SECONDARY(dev, root_type);
PIC_INIT_SECONDARY(dev, rootnum);
}
}
//mtx_unlock(&isrc_table_lock);

View file

@ -35,12 +35,6 @@
#ifndef _MACHINE_INTR_MACHDEP_H_
#define _MACHINE_INTR_MACHDEP_H_
enum root_type {
INTR_ROOT_IRQ = 0,
INTR_ROOT_COUNT /* MUST BE LAST */
};
#ifndef NIRQ
#define NIRQ 1024
#endif

View file

@ -241,7 +241,7 @@ intc_setup_intr(device_t dev, struct intr_irqsrc *isrc,
#ifdef SMP
static void
intc_init_secondary(device_t dev, enum root_type root_type)
intc_init_secondary(device_t dev, uint32_t rootnum)
{
struct intc_softc *sc;
struct intr_irqsrc *isrc;

View file

@ -39,6 +39,8 @@
#define INTR_IRQ_INVALID 0xFFFFFFFF
#define INTR_ROOT_IRQ 0
enum intr_map_data_type {
INTR_MAP_DATA_ACPI = 0,
INTR_MAP_DATA_FDT,
@ -113,12 +115,12 @@ u_int intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask);
struct intr_pic *intr_pic_register(device_t, intptr_t);
int intr_pic_deregister(device_t, intptr_t);
int intr_pic_claim_root(device_t, intptr_t, intr_irq_filter_t *, void *,
enum root_type);
uint32_t);
int intr_pic_add_handler(device_t, struct intr_pic *,
intr_child_irq_filter_t *, void *, uintptr_t, uintptr_t);
bool intr_is_per_cpu(struct resource *);
device_t intr_irq_root_device(enum root_type);
device_t intr_irq_root_device(uint32_t);
/* Intr interface for BUS. */
@ -166,7 +168,7 @@ void intr_ipi_send(cpuset_t cpus, u_int ipi);
void intr_ipi_dispatch(u_int ipi);
#endif
/* Main interrupt handler called from asm on many archs. */
void intr_irq_handler(struct trapframe *tf, u_register_t root_type);
/* Main interrupt handler called from asm on most archs except riscv. */
void intr_irq_handler(struct trapframe *tf, uint32_t rootnum);
#endif /* _SYS_INTR_H */